CKSEL=others
System Clock Source Control Register
| CKSEL | Clock Source Select Selecting the system clock source faster than 32MHz(system clock source > 32MHz ) is prohibit when SCKDIVCR.ICK[2:0] bits select the division-by-1 and MEMWAIT.MEMWAIT =0. 0 (000): HOCO 0 (others): Setting prohibited 1 (001): MOCO 2 (010): LOCO 3 (011): Main clock oscillator 4 (100): Sub-clock oscillator 5 (101): PLL |
| Reserved | These bits are read as 00000. The write value should be 00000. |